The free online uptime monitoring service with an App is available for iOS and Android.
With the Free Plan, you can monitor up to 50 URLs, check for a website's content (using the keyword monitor), ping your server or monitor your ports in 5-minute intervals. You can create a status page to showcase your uptime. SMS or Call alerts can be bought anytime.
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BrandMail Email Signatures for Outlook
Leverage every email as an opportunity to brand consistently and minimise the security risks associated with the tampering of HTML signatures.
BrandMail®, developed by BrandQuantum, is a software solution that seamlessly integrates with Microsoft Outlook to empower every employee in the organisation to automatically create consistently branded emails via a single toolbar that provides access to brand standards and the latest pre-approved content.
CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files.
Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).
For AI teams and Computer Vision team in organizations of all size
AI-Assisted features of the Ango Hub will automate your AI data workflows to improve data labeling efficiency and model RLHF, all while allowing domain experts to focus on providing high-quality data.
CRC Generator is a command-line application that generates Verilog or VHDL code for CRC of any data width between 1 and 1024 and polynomial width between 1 and 1024. The code is written in C for
Win32, bus easily portable for other platforms
A command-line application that generates Verilog or VHDL code for an LFSR counter of any value up to 63 bit wide. The code is written in C for Win32 platform
This is the award-winning FALCON I object recognition system! Capable of tracking up to 12 different objects simultaneously, and with over 6 times the raw resolution of the CMUCam, this is one of the most powerful vision systems in its class.
m4-la is a Logic Analyzer written in VHDL for the Xilinx ML403 Development board featuring the Virtex4 FPGA. The user interface is written in C for Windows32 based platforms. Xilinx ISE and EDK tools compile the VHDL and MS Visual Studio compiles the UI.